1. Field of Disclosure
The present disclosure relates to a device for the transmission of signals between two data processors. More particularly, the disclosure relates to a device for the exchange of data between a host processor and a slave processor. A connection between the two processors is provided by a single data line, and communications are conducted in one direction, from the slave processor to the host processor.
2. Related Art
For portable electronic devices, like cell phones, personal digital assistants, and camcorders, for example, architectures/protocols have been developed for connecting various components of the portable electronics together so that they can communicate. A simple example is a battery pack (a xe2x80x9cslavexe2x80x9d component) that is removably connectable to a portable electronic device (a xe2x80x9chostxe2x80x9d device). At the very least, the battery pack should be able to communicate with the portable electronic device to inform the camcorder of the amount of energy contained in the battery.
Preferably, the communication architecture is designed with as few connections as possible. Currently, one of the most used architectures is the system management (SM) bus, which includes three wires to interconnect host devises and slave components. The devices and components communicate over one of the wires, while a clocking signal is provided over the second wire, and the third wire is used as a ground.
A currently popular protocol for use over the SM bus is the Inter-Integrated Circuit (I2C), which was originally developed by Philips Semiconductor. The protocol utilizes a synchronous signal and has the advantage of accommodating multiple master and multiple slave components (including multiple batteries, wherein the system monitors various aspects of the condition of each battery).
For cell phone manufacturers, however, there has been an emphasis on using a communication architecture including only two wires. An architecture/protocol that has been adopted by most cellular phone companies is the xe2x80x9cDQxe2x80x9d system developed by Dallas Semiconductor, Benchmarq, Unitrode, and Texas Instrument. The DQ system uses a single wire and a ground wire to connect a host device to multiple slave components. Data is transmitted in two directions on the one non-ground wire. The architecture includes a pull up resistor that maintains the line in a high state, and allows data to be transmitted by pulling the line down, so that the state of the line is up or down for each transmitted bit.
One drawback of the bi-directional, one-wire bus is, that with multiple slave components connected to one master device, handshaking becomes complicated, and the host device must interrogate each slave component separately.
Another drawback of the bi-directional, one-wire bus is that some use of time-domain or frequency-domain relations, to track the two half-channels of communication is required. In an effort to minimize the expense of the system, a crude time base is provided by using an unstable oscillator. This crude time base, together with electrical relationships, provides the necessary reference for two-way communication over a one-wire bus.
A further drawback of the bi-directional, one-wire bus is that, because of the bi-directional nature of the communications, the slave component must require the ability to sample the data line and receive messages from the host. A slave component of an I2C system, therefore, will in most cases require the architecture necessary to allow the slave to receive messages, thereby increasing the cost and complexity of the slave.
What is still desired, accordingly, is a new and improved communications architecture/protocol for connecting a processor of slave component to a processor of a host component. Preferably, the new architecture/protocol will be simple and inexpensive in comparison to the above describe I2C and DQ systems.
In response, the present disclosure provides a data communication interface for transferring at least one data bit to a host processor. The interface includes a one-wire data line, and a slave processor connected to the data line and including a pull-down circuit for varying voltage on the data line. The slave processor is incapable of sampling data from the data line, but is programmed to vary voltage on the data line using the pull-down circuit when the data line is energized, to signal at least one data bit.
According to one aspect of the present disclosure, the slave processor is programmed to pull the voltage low on the energized data line to signal a xe2x80x9c0xe2x80x9d and to raise the voltage high on the energized data line to signal a xe2x80x9c1xe2x80x9d.
According to another aspect of the present disclosure, the interface includes a host processor connected to the data line and including a pull-down circuit for varying voltage on the data line at the request of the host processor. The host processor is capable of sampling data from the data line, and is programmed to energize the data line using the pull-down circuit when at least one data bit is desired from the slave processor. The host processor is also programmed to sample the voltage on the energized data line to determine the value of a bit signaled by the slave processor.
As described in greater detail below, the presently disclosed communications architecture/protocol uses a minimum amount of hardware to communicate pre-selected information from the slave to the host. The communication format is simple and does not require continuous monitoring, resulting in a reduction of power consumption for both the host and the slave, which is of course important in portable electronic devices. The presently disclosed one-way, single wire communication interface, accordingly, is particularly attractive for hand-held or other low-power portable electronic devices, such as cell phones, personal digital assistants and camcorders, for example.